Abstract: In recent years, low power design has become one of the prime focuses for the digital VLSI circuit. Keeping the same in mind a new design of 2-Bit GDI ... CMOS magnitude comparator. Both the ...

In the diagram, a 2-bit magnitude comparator is split into two blocks: digital and analog. The digital portion of the circuit is implemented using Verilog. For the analog portion, the two 3-input ”OR” ...

Abstract: Design of a 2-bit binary Magnitude Comparator (MC) is presented in this research. The proposed MC has been designed using Conventional CMOS (CCMOS) logic, Pass Transistor Logic (PTL). The ...