The design of a 2-bit magnitude comparator utilizing Synopsys Custom Compiler on 28nm CMOS technology is shown in this repository. This study offers a CMOS circuit for a 2-bit magnitude comparator.

In the diagram, a 2-bit magnitude comparator is split into two blocks: digital and analog. The digital portion of the circuit is implemented using Verilog. For the analog portion, the two 3-input ”OR” ...

In recent years, low power design has become one of the prime focuses for the digital VLSI circuit. Keeping the same in mind a new design of 2-Bit GDI based Magnitude Comparator has been proposed and ...