This project implements a BCD (Binary-Coded Decimal) Adder and Subtractor using Verilog HDL ... BCD_Adder.v Performs BCD addition of two 4-bit numbers with proper correction when sum > 9.

CMOS Layout Design for Combinational Circuits, using ... subtractor circuit A 4-bit Full Adder is designed to generate a 4-bit Sum and is designed by combining four 2-bit Full Adders and as a result ...