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Design and Implementation of Low Power NAND Gate Based Combinational Circuits Using FinFET Technique
The Cadence Virtuoso 6.1.7 software was used to design and test digital logic circuits in two different technologies, CMOS 180nm, and FinFET. Principles of NAND gate design were applied to create CMOS ...
To implement the 3 basic logic gates, 2 ULG ICs are needed. The study was conducted to simulate a Logic Gates Multiplexer Integrated Circuit (LOMI) where AND, OR, and NOT logic can be selected to ...
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