Abstract: In this research work, a unique Hybrid Full Adder (HFA) is developed by deploying Pass Transistor ... terms of PDP which may be applicable for basic building blocks of VLSI circuits.

The simulation results indicate the considerable efficiency of power consumption, speed and leakage current in the full adder cell rather than other cells. [1] A. Bellaouar and I. Mohammad and ...

The conventional Full Adder Circuit consists of 2 blocks one for sum calculation ... (references) [2] Neil H.Weste, Harris, A. Banerjee, “CMOS VLSI Design, A circuits and System Perspective”, 2014, ...

Abstract: In this research work, a unique Hybrid Full Adder (HFA) is developed by deploying Pass Transistor ... terms of PDP which may be applicable for basic building blocks of VLSI circuits.