Therefore, by forcing input B to a logic low, Q2 is always closed and Q6 is always opened, and you can use A as input 1 and C as input 2, with the gate working as a two-input CMOS NAND gate.

The first circuit to be created is 'Invert', that is, a circuit that outputs '0' for the input of '1' and '1' for the input of '0'. The NAND gate is a circuit that outputs '0' when both inputs are ...