Whether you’re doing a mobile or a desktop PCIe card or socket, the diffpair layout guidelines, the few required signals, and the strong compatibility between link widths and generations stays ...

Micron has shown off the capabilities of its next-generation PCIexpress 6.0 SSD, hitting over 27GBps during a DesignCon 2025 ...

Micron and Astera Labs unveil the world's fastest PCIe 6.0 SSD, achieving 27 GB/s read speeds, doubling the performance of ...

using e.g. an x16 PCIe slot with 16 lanes. It does however mean we’re using serial links that run at many GHz and must be implemented as differential pairs to protect signal integrity.

Anubhav Mangla emphasizes that PCIe has evolved from replacing parallel PCI to a cornerstone of modern computing, continually ...

In addition, increased capacitive coupling at higher frequencies adds more interference or noise to the signal, making the crosstalk worse than it was in PCIe 4.0 channels. These factors combine to ...

Broadcom’s new products are based on PCIe 6, the latest iteration of the interconnect. It provides double the bandwidth of the previous generation for a total of 64 gigabits per second per lane. A ...

Last March, Astera's booth at GTC 2024 showed off its PCIe 6.0 Aries retimers—a device that acts as a signal repeater for PCIe devices, boosting PCIe signal integrity when tools such as PCIe ...

Using leading-edge design, analysis, simulation, and measurement techniques, Synopsys delivers exceptional signal integrity and jitter performance that exceeds the PCI Express standard’s electrical ...

Using leading-edge design, analysis, simulation, and measurement techniques, Synopsys delivers exceptional signal integrity and jitter performance that exceeds the PCI Express standard’s electrical ...