Up until now the trace back technique and the register-exchange approaches are two major techniques used for the path history management in the chip designs of Viterbi decoders. The former takes up ...

A high speed and low power Viterbi decoder architecture design based on deep pipelined, clock gating and toggle filtering has been presented in this paper. The Add-Compare-Select (ACS) and Trace Back ...

One way to optimize the Viterbi algorithm is to simplify the trellis diagram by reducing the number of states and branches. This can be done by using punctured codes, which skip some of the ...