In the other direction, driving a 3.3V input from a 5V output you might expect that a level shifting circuit would be required, and in many cases you would be right ... TTL and CMOS logic ...

Fig 1. A typical CMOS input circuit comprises a “P” and “N” transistor. One is fully “on” for logic high, and the other is “on” for a logic low. Fig 2. When a CMOS input pin is at ...

are realised with ideal high and low logic states. By incorporating a CMOS inverter with a gain much greater than one in the PTL circuits, PTL/CMOS hybrid circuits are constructed with signal ...

Jacob “Jake” Baker points out in the preface to this comprehensive volume, CMOS technology has ... including inverters, static logic gates, clocked circuits, dynamic logic gates, and memory ...